JPH0211033B2 - - Google Patents
Info
- Publication number
- JPH0211033B2 JPH0211033B2 JP61073833A JP7383386A JPH0211033B2 JP H0211033 B2 JPH0211033 B2 JP H0211033B2 JP 61073833 A JP61073833 A JP 61073833A JP 7383386 A JP7383386 A JP 7383386A JP H0211033 B2 JPH0211033 B2 JP H0211033B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- wire
- hole
- insulated
- wires
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
- H05K7/06—Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0286—Programmable, customizable or modifiable circuits
- H05K1/0287—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
- H05K1/0289—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns having a matrix lay-out, i.e. having selectively interconnectable sets of X-conductors and Y-conductors in different planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61073833A JPS62230092A (ja) | 1986-03-31 | 1986-03-31 | 必要な配線パタ−ンに絶縁電線を使用した高密度配線板の製造法 |
US07/032,247 US4791238A (en) | 1986-03-31 | 1987-03-31 | High-density wired circuit board using insulated wires |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61073833A JPS62230092A (ja) | 1986-03-31 | 1986-03-31 | 必要な配線パタ−ンに絶縁電線を使用した高密度配線板の製造法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62230092A JPS62230092A (ja) | 1987-10-08 |
JPH0211033B2 true JPH0211033B2 (en]) | 1990-03-12 |
Family
ID=13529534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61073833A Granted JPS62230092A (ja) | 1986-03-31 | 1986-03-31 | 必要な配線パタ−ンに絶縁電線を使用した高密度配線板の製造法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US4791238A (en]) |
JP (1) | JPS62230092A (en]) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU610249B2 (en) * | 1987-09-29 | 1991-05-16 | Microelectronics And Computer Technology Corporation | Customizable circuitry |
US5165166A (en) * | 1987-09-29 | 1992-11-24 | Microelectronics And Computer Technology Corporation | Method of making a customizable circuitry |
US4888665A (en) * | 1988-02-19 | 1989-12-19 | Microelectronics And Computer Technology Corporation | Customizable circuitry |
US5081561A (en) * | 1988-02-19 | 1992-01-14 | Microelectronics And Computer Technology Corporation | Customizable circuitry |
US5201855A (en) * | 1991-09-30 | 1993-04-13 | Ikola Dennis D | Grid system matrix for transient protection of electronic circuitry |
JP3408590B2 (ja) * | 1993-09-29 | 2003-05-19 | 富士通株式会社 | 多層プリント基板の配線構造 |
DE69934981T2 (de) * | 1998-05-19 | 2007-11-15 | Ibiden Co., Ltd., Ogaki | Gedruckte leiterplatte und verfahren zur herstellung |
US6262487B1 (en) | 1998-06-23 | 2001-07-17 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method |
US6232564B1 (en) | 1998-10-09 | 2001-05-15 | International Business Machines Corporation | Printed wiring board wireability enhancement |
USD574339S1 (en) * | 2005-06-24 | 2008-08-05 | Nitto Denko Corporation | Pattern formed on the ground layer of a multilayer printed circuit board |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3674914A (en) * | 1968-02-09 | 1972-07-04 | Photocircuits Corp | Wire scribed circuit boards and method of manufacture |
US3674602A (en) * | 1969-10-09 | 1972-07-04 | Photocircuits Corp | Apparatus for making wire scribed circuit boards |
US3969816A (en) * | 1972-12-11 | 1976-07-20 | Amp Incorporated | Bonded wire interconnection system |
FR2243578B1 (en]) * | 1973-09-12 | 1976-11-19 | Honeywell Bull Soc Ind | |
JPS5530822A (en) * | 1978-08-25 | 1980-03-04 | Fujitsu Ltd | Printed board |
JPS5543639A (en) * | 1978-09-22 | 1980-03-27 | Nec Corp | Chinese character display system for cathoderay tube character display unit |
US4554405A (en) * | 1982-06-28 | 1985-11-19 | International Business Machines Corporation | High density encapsulated wire circuit board |
-
1986
- 1986-03-31 JP JP61073833A patent/JPS62230092A/ja active Granted
-
1987
- 1987-03-31 US US07/032,247 patent/US4791238A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS62230092A (ja) | 1987-10-08 |
US4791238A (en) | 1988-12-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |